1. Technical Field
The present invention relates to a plasma etching method for etching an etching object by irradiating plasma on the etching object and a semiconductor device manufacturing method.
2. Description of the Related Art
Plasma etching that involves irradiating plasma on an etching film (or etching substrate) to etch the film or substrate is an indispensable process for semiconductor device manufacturing. In plasma etching, etching gas is activated by a high frequency electric field to generate plasma. Plasma includes active species such as charged particles (referred to as “ion” hereinafter) and neutral particles (referred to as “radicals” hereinafter), for example. The surface of a wafer as the etching object reacts with the ions and radicals contained in the plasma to prompt the generation of reaction products, and etching of the wafer progresses as the reaction products are volatized.
In recent years, the diameters of wafer holes are becoming larger. As the wafer hole diameter is enlarged, it becomes increasingly difficult to ensure in-plane etch rate uniformity within a wafer plane. Techniques are known for improving in-plane uniformity within a wafer plane by controlling the density of active species within a center region and an edge region of a wafer plane through adjustment of the etching gas supply rate of etching gas supplied from an upper electrode (see e.g., Patent Document 1).
In the case of forming via holes or trenches within a wafer through plasma etching, etching conditions (processing gas supply rate, pressure within chamber during etching, wafer temperature, etc.) are adjusted to ensure in-plane uniformity of the depths and widths of the via holes and trenches formed within the wafer. For example, before starting device manufacturing, a test wafer may be etched in a preliminary experiment. If a via hole width (inner diameter) is smaller at an edge region of the wafer and becomes larger at a center region of the wafer, etching conditions may be adjusted to correct such a disparity. However, even if uniformity of the via hole width within the wafer plane may be achieved by adjusting the processing gas supply rate, for example, disparities in the via hole depth within the wafer plane may increase as a result of such an adjustment. That is, it is difficult to independently control profile parameters (e.g., width, diameter, depth) of via holes and trenches, and thus, it is difficult to achieve uniformity in the etching profiles of via holes and trenches within a wafer plane.
In light of the above problems, one object of the present invention is to provide a plasma etching method that can achieve uniformity in the etching profiles of via holes and trenches within a wafer plane.